HWA
Bare metal programming with style
aca_2.h
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1 
2 /*
3  * This file is part of the HWA project.
4  * Copyright (c) 2012,2015 Christophe Duparquet.
5  * All rights reserved. Read LICENSE.TXT for details.
6  */
7 
38 /*
39  * FIXME
40  *
41  * Another solution could be the creation of an object `admux0` for the analog
42  * multiplexer that's shared between the ADC and the ACMP but the ADC and ACMP
43  * can not use the analog multiplexer at the same time. Then, it seems
44  * acceptable to make the configuration instructions of the ADC or of the ACMP
45  * drive the analog multiplexer.
46  */
47 #define hwa_configure__aca , _hwa_cfaca
48 
49 /* Optionnal parameter `edge`
50  */
51 #define _hwa_cfaca(o,a,k,...) do { HW_BW(_hwa_cfaca_ed,edge,k)(o,k,__VA_ARGS__,,); } while(0)
52 #define _hwa_cfaca_ed0(o,k,...) HW_BW(_hwa_cfaca_po,positive_input,k)(o,k,__VA_ARGS__)
53 #define _hwa_cfaca_ed1(o,k,v,...) HW_BV(_hwa_cfaca_ed1,aca_edge_,v,)(o,__VA_ARGS__))
54 #define _hwa_cfaca_ed1_(v,...) HW_EM_XNIL(v,(falling,rising,both)); HW_EAT(
55 #define _hwa_cfaca_ed10(v,...) HW_EM_XNIL(v,(falling,rising,both)); HW_EAT(
56 #define _hwa_cfaca_ed11(v,...) _hwa_cfaca_ed12(v, HW_RP
57 #define _hwa_cfaca_ed12(...) _hwa_cfaca_ed13(__VA_ARGS__)
58 #define _hwa_cfaca_ed13(v,o,k,...) _hwa_write(o,acis,v); HW_BW(_hwa_cfaca_po,positive_input,k)(o,k,__VA_ARGS__)
59 
60 #define _hw_aca_edge_falling , 2 /* ACIS */
61 #define _hw_aca_edge_rising , 3
62 #define _hw_aca_edge_both , 0
63 
64 /* Optionnal parameter `positive_input`
65  */
66 #define _hwa_cfaca_po0(o,k,...) HW_BW(_hwa_cfaca_ne,negative_input,k)(o,k,__VA_ARGS__)
67 #define _hwa_cfaca_po1(o,k,v,...) HW_BW(_hwa_cfaca_po1,bandgap,v)(o,v,__VA_ARGS__)
68 #define _hwa_cfaca_po11(o,v,k,...) _hwa_write(o,acbg,1); HW_BW(_hwa_cfaca_ne,negative_input,k)(o,k,__VA_ARGS__)
69 #define _hwa_cfaca_po10(o,v,k,...) \
70  if ( HW_ADDRESS(v)==HW_ADDRESS(pin_ain0) ) \
71  _hwa_write(o,acbg,0); \
72  else \
73  HWA_E(HW_EM_VAL(v,positive_input,((pin,ain0),bandgap))); \
74  HW_BW(_hwa_cfaca_ne,negative_input,k)(o,k,__VA_ARGS__)
75 
76 
77 /* Optionnal parameter `negative_input`
78  */
79 #define _hwa_cfaca_ne0(o,...) HW_EOL(__VA_ARGS__)
80 #define _hwa_cfaca_ne1(o,k,v,...) \
81  uint32_t a = HW_ADDRESS(v); \
82  if ( a == HW_ADDRESS(pin_ain1) ) _hwa_write(o,acme,0); \
83  else { \
84  _hwa_write(o,acme,1); \
85  _hwa_write(o,aden,0); \
86  if ( a == HW_ADDRESS(pin_adc0) ) _hwa_write(o,admux,0); \
87  else if ( a == HW_ADDRESS(pin_adc1) ) _hwa_write(o,admux,1); \
88  else if ( a == HW_ADDRESS(pin_adc2) ) _hwa_write(o,admux,2); \
89  else if ( a == HW_ADDRESS(pin_adc3) ) _hwa_write(o,admux,3); \
90  else if ( a == HW_ADDRESS(pin_adc4) ) _hwa_write(o,admux,4); \
91  else if ( a == HW_ADDRESS(pin_adc5) ) _hwa_write(o,admux,5); \
92  else if ( a == HW_ADDRESS(pin_adc6) ) _hwa_write(o,admux,6); \
93  else if ( a == HW_ADDRESS(pin_adc7) ) _hwa_write(o,admux,7); \
94  else HWA_E(HW_EM_VAL(v,negative_input,((pin,ain1), (pin,adc0..7)))); \
95  } \
96  HW_EOL(__VA_ARGS__)
97 
98 
99 /*******************************************************************************
100  * *
101  * Context management *
102  * *
103  *******************************************************************************/
104 
105 #define _hwa_setup__aca(o,a) _hwa_setup_r( o, csr );
106 
107 #define _hwa_init__aca(o,a) _hwa_init_r( o, csr, 0x00 );
108 
109 #define _hwa_commit__aca(o,a) _hwa_commit_r( o, csr );
110 
111