HWA
Bare metal programming with style
acb_2.h
Go to the documentation of this file.
1
2
/*
3
* This file is part of the HWA project.
4
* Copyright (c) 2012,2015 Christophe Duparquet.
5
* All rights reserved. Read LICENSE.TXT for details.
6
*/
7
38
/*
39
* NOTE: another solution could be the creation of an object `admux0` for
40
* the analog multiplexer that's shared between the ADC and the ACMP but the
41
* ADC and ACMP can not use the analog multiplexer at the same time. Then, it
42
* seems acceptable to make the configuration instructions of the ADC or the
43
* ACMP drive the analog multiplexer transparently.
44
*/
45
#define hwa_configure__acb , _hwa_cfacb
46
47
/* Optionnal parameter `edge`
48
*/
49
#define _hw_acb_edge_falling , 2
/* ACIS */
50
#define _hw_acb_edge_rising , 3
51
#define _hw_acb_edge_both , 0
52
53
#define _hwa_cfacb(o,a,k,...) \
54
do { \
55
HW_B(_hwa_cfacb_xedge_,_hw_is_edge_##k)(o,k,__VA_ARGS__,,); \
56
} while(0)
57
58
#define _hwa_cfacb_xedge_1(o,k,v,...) \
59
HW_B(_hwa_cfacb_vedge_,_hw_acb_edge_##v)(o,v,__VA_ARGS__)
60
61
#define _hwa_cfacb_vedge_0(o,v,...) \
62
HW_E(HW_EM_VAL( v,edge,(falling,rising,both)))
63
64
#define _hwa_cfacb_vedge_1(o,v,k,...) \
65
_hwa_write(o,acis, HW_A1(_hw_acb_edge_##v)); \
66
HW_G2(_hwa_cfacb_xposin,HW_IS(positive_input,k))(o,k,__VA_ARGS__)
67
68
#define _hwa_cfacb_xedge_0(o,k,...) \
69
HW_G2(_hwa_cfacb_xposin,HW_IS(positive_input,k))(o,k,__VA_ARGS__)
70
71
/* Optionnal parameter `positive_input`
72
*/
73
#define _hwa_cfacb_xposin_1(o,k,v,...) \
74
HW_B(_hwa_cfacb_vposin_bandgap_,_hw_is_bandgap_##v)(o,v,__VA_ARGS__)
75
76
#define _hwa_cfacb_vposin_bandgap_1(o,v,k,...) \
77
_hwa_write(o,acbg,1); \
78
HW_G2(_hwa_cfacb_xnegin,HW_IS(negative_input,k))(o,k,__VA_ARGS__)
79
80
#define _hwa_cfacb_vposin_bandgap_0(o,v,k,...) \
81
if ( HW_ADDRESS(v)==HW_ADDRESS(pin_ain0) ) \
82
_hwa_write(o,acbg,0); \
83
else \
84
HWA_E(HW_EM_VAL(v,positive_input,((pin,ain0),bandgap))); \
85
HW_G2(_hwa_cfacb_xnegin,HW_IS(negative_input,k))(o,k,__VA_ARGS__)
86
87
#define _hwa_cfacb_xposin_0(o,k,...) \
88
HW_G2(_hwa_cfacb_xnegin,HW_IS(negative_input,k))(o,k,__VA_ARGS__)
89
90
/* Optionnal parameter `negative_input`
91
*/
92
#define _hwa_cfacb_xnegin_0(o,...) HW_EOL(__VA_ARGS__)
93
94
#define _hwa_cfacb_xnegin_1(o,k,v,...) \
95
uint32_t a = HW_ADDRESS(v); \
96
if ( a==HW_ADDRESS(pin_ain1) ) { _hwa_write(o,acme,0); \
97
} else { \
98
_hwa_write(o,acme,1); \
99
_hwa_write(o,aden,0); \
100
if ( a == HW_ADDRESS(pin_adc0) ) _hwa_write(o,admux, 0); \
101
else if ( a == HW_ADDRESS(pin_adc1) ) _hwa_write(o,admux, 1); \
102
else if ( a == HW_ADDRESS(pin_adc2) ) _hwa_write(o,admux, 2); \
103
else if ( a == HW_ADDRESS(pin_adc3) ) _hwa_write(o,admux, 3); \
104
else HWA_E(HW_EM_VAL(v,negative_input,((pin,ain1),(pin,adc0..3)))); \
105
} \
106
HW_EOL(__VA_ARGS__)
107
108
109
#define hw_power__acb , _hw_power
110
#define hwa_power__acb , _hwa_power
111
112
113
/*******************************************************************************
114
* *
115
* Context management *
116
* *
117
*******************************************************************************/
118
119
#define _hwa_setup__acb(o,a) _hwa_setup_r( o, csr )
120
#define _hwa_init__acb(o,a) _hwa_init_r( o, csr, 0x00 )
121
#define _hwa_commit__acb(o,a) _hwa_commit_r( o, csr )
122
Generated for HWA by
1.8.6