HWA
Bare metal programming with style
uarta_2.h
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1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2012,2015 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
47 #define _hwa_cfuarta(o,a,k,...) \
48  do { HW_B(_hwa_cfuarta_kbps_,_hw_is_bps_##k)(o,k,__VA_ARGS__,,) } while(0)
49 
50 #define hwa_configure__uarta , _hwa_cfuarta
51 
52 /* Optionnal parameter `bps`
53  * Choose the U2X value that gives the lowest error
54  */
55 #define _hwa_cfuarta_kbps_1(o,k,v,...) \
56  HW_B(_hwa_cfuarta_vbps_,v)(o,v,__VA_ARGS__)
57 
58 #define _hwa_cfuarta_vbps_1(o,v,...) HW_E(HW_EM_VAM(bps))
59 
60 #define _hwa_cfuarta_vbps_0(o,v,k,...) \
61  uint32_t brr8 = (HW_SYSHZ / 8 + (v/2)) / v ; \
62  uint32_t brr16 = (HW_SYSHZ / 16 + (v/2)) / v ; \
63  float e16 = 1.0 * HW_SYSHZ / (16*brr16) / v ; \
64  float e8 = 1.0 * HW_SYSHZ / (8*brr8) / v ; \
65  if ( e16 < 1.0 ) e16 = 2.0 - e16 ; \
66  if ( e8 < 1.0 ) e8 = 2.0 - e8 ; \
67  if ( e8 < e16 && brr8 > 0 && brr8 < 0x1000 ) { \
68  hwa->o.config.u2x = 1 ; \
69  hwa->o.config.brr = brr8-1 ; \
70  } \
71  else if ( brr16 > 0 && brr16 < 0x1000 ) { \
72  hwa->o.config.u2x = 0 ; \
73  hwa->o.config.brr = brr16-1 ; \
74  } \
75  else \
76  HWA_E(HW_EM_XSO(bps,o)); \
77  HW_B(_hwa_cfuarta_kdatabits_,_hw_is_databits_##k)(o,k,__VA_ARGS__)
78 
79 #define _hwa_cfuarta_kbps_0(o,k,...) \
80  HW_B(_hwa_cfuarta_kdatabits_,_hw_is_databits_##k)(o,k,__VA_ARGS__)
81 
82 /* Optionnal parameter `databits`
83  */
84 #define _hwa_cfuarta_kdatabits_1(o,k,v,...) \
85  HW_B(_hwa_cfuarta_vdatabits_,_hw_uarta_csz_##v)(o,v,__VA_ARGS__)
86 
87 #define _hwa_cfuarta_vdatabits_0(o,v,...) HW_E(HW_EM_VOAL(v,databits,(5,6,7,8,9)))
88 
89 #define _hwa_cfuarta_vdatabits_1(o,v,k,...) \
90  hwa->o.config.csz = HW_A1(_hw_uarta_csz_##v); \
91  HW_B(_hwa_cfuarta_kparity_,_hw_is_parity_##k)(o,k,__VA_ARGS__)
92 
93 #define _hwa_cfuarta_kdatabits_0(o,k,...) \
94  HW_B(_hwa_cfuarta_kparity_,_hw_is_parity_##k)(o,k,__VA_ARGS__)
95 
96 #define _hw_uarta_csz_5 , 0
97 #define _hw_uarta_csz_6 , 1
98 #define _hw_uarta_csz_7 , 2
99 #define _hw_uarta_csz_8 , 3
100 #define _hw_uarta_csz_9 , 7
101 
102 /* Optionnal parameter `parity`
103  */
104 #define _hwa_cfuarta_kparity_1(o,k,v,...) \
105  HW_B(_hwa_cfuarta_vparity_,_hw_uarta_pm_##v)(o,v,__VA_ARGS__)
106 
107 #define _hwa_cfuarta_vparity_0(o,v,...) HW_E(HW_EM_VOAL(v,parity,(none,even,odd)))
108 
109 #define _hwa_cfuarta_vparity_1(o,v,k,...) \
110  hwa->o.config.pm = HW_A1(_hw_uarta_pm_##v); \
111  HW_B(_hwa_cfuarta_kstopbits_,_hw_is_stopbits_##k)(o,k,__VA_ARGS__)
112 
113 #define _hwa_cfuarta_kparity_0(o,k,...) \
114  HW_B(_hwa_cfuarta_kstopbits_,_hw_is_stopbits_##k)(o,k,__VA_ARGS__)
115 
116 #define _hw_uarta_pm_none , 0
117 #define _hw_uarta_pm_even , 2
118 #define _hw_uarta_pm_odd , 3
119 
120 /* Optionnal parameter `stopbits`
121  */
122 #define _hwa_cfuarta_kstopbits_1(o,k,v,...) \
123  HW_B(_hwa_cfuarta_vstopbits_,_hw_uarta_sbs_##v)(o,v,__VA_ARGS__)
124 
125 #define _hwa_cfuarta_vstopbits_0(o,v,...) HW_E(HW_EM_VOAL(v,stopbits,(1,2)))
126 
127 #define _hwa_cfuarta_vstopbits_1(o,v,k,...) \
128  hwa->o.config.sbs = HW_A1(_hw_uarta_sbs_##v); \
129  HW_B(_hwa_cfuarta_kreceiver_,_hw_is_receiver_##k)(o,k,__VA_ARGS__)
130 
131 #define _hwa_cfuarta_kstopbits_0(o,k,...) \
132  HW_B(_hwa_cfuarta_kreceiver_,_hw_is_receiver_##k)(o,k,__VA_ARGS__)
133 
134 #define _hw_uarta_sbs_1 , 0
135 #define _hw_uarta_sbs_2 , 1
136 
137 /* Optionnal parameter `receiver`
138  */
139 #define _hwa_cfuarta_kreceiver_1(o,k,v,...) \
140  HW_B(_hwa_cfuarta_vreceiver_,_hw_state_##v)(o,v,__VA_ARGS__)
141 
142 #define _hwa_cfuarta_vreceiver_0(o,v,...) HW_E(HW_EM_VOAST(v,receiver))
143 
144 #define _hwa_cfuarta_vreceiver_1(o,v,k,...) \
145  hwa->o.config.rxen = HW_A1(_hw_state_##v); \
146  HW_B(_hwa_cfuarta_ktransmitter_,_hw_is_transmitter_##k)(o,k,__VA_ARGS__)
147 
148 #define _hwa_cfuarta_kreceiver_0(o,k,...) \
149  HW_B(_hwa_cfuarta_ktransmitter_,_hw_is_transmitter_##k)(o,k,__VA_ARGS__)
150 
151 /* Optionnal parameter `transmitter`
152  */
153 #define _hwa_cfuarta_ktransmitter_1(o,k,v,...) \
154  HW_B(_hwa_cfuarta_vtransmitter_,_hw_state_##v)(o,v,__VA_ARGS__)
155 
156 #define _hwa_cfuarta_vtransmitter_0(o,v,...) HW_E(HW_EM_VOAST(v,transmitter))
157 
158 #define _hwa_cfuarta_vtransmitter_1(o,v,...) \
159  hwa->o.config.txen = HW_A1(_hw_state_##v); \
160  _hwa_cfuarta_end(o,__VA_ARGS__)
161 
162 #define _hwa_cfuarta_ktransmitter_0(o,...) \
163  _hwa_cfuarta_end(o,__VA_ARGS__)
164 
165 #define _hwa_cfuarta_end(o,...) \
166  _hwa_write(o,brr, hwa->o.config.brr ); \
167  _hwa_write(o,2x, hwa->o.config.u2x ); \
168  _hwa_write(o,csz, hwa->o.config.csz ); \
169  _hwa_write(o,pm, hwa->o.config.pm ); \
170  _hwa_write(o,sbs, hwa->o.config.sbs ); \
171  _hwa_write(o,rxen, hwa->o.config.rxen ); \
172  _hwa_write(o,txen, hwa->o.config.txen ); \
173  HW_EOL(__VA_ARGS__)
174 
175 
190 #define hw_read__uarta , _hw_rduarta
191 #define _hw_rduarta(o,a,...) _hw_read(o,dr) HW_EOL(__VA_ARGS__)
192 
193 
206 #define hw_write__uarta , _hw_wruarta
207 #define _hw_wruarta(o,a,v,...) _hw_write(o,dr,v) HW_EOL(__VA_ARGS__)
208 
209 
210 /* Power management
211  */
212 #define hw_power__uarta , _hw_power
213 #define hwa_power__uarta , _hwa_power
214 
215 
236 typedef union {
237  uint8_t byte ;
238  struct {
239  unsigned int __0_1 : 2 ;
240  unsigned int pe : 1 ;
241  unsigned int dor : 1 ;
242  unsigned int fe : 1 ;
243  unsigned int txqnf : 1 ;
244  unsigned int txc : 1 ;
245  unsigned int rxc : 1 ;
246  };
247  struct {
248  unsigned int ___0_1 : 2 ;
249  unsigned int parity_error : 1 ;
250  unsigned int overrun : 1 ;
251  unsigned int frame_error : 1 ;
252  unsigned int _txqnf : 1 ;
253  unsigned int _txc : 1 ;
254  unsigned int _rxc : 1 ;
255  };
256 } _hw_uarta_stat_t ;
257 
258 #define hw_stat_t__uarta , _hw_sttuarta
259 #define _hw_sttuarta(o,a,...) _hw_uarta_stat_t HW_EOL(__VA_ARGS__)
260 
261 #define hw_stat__uarta , _hw_stuarta
262 #define _hw_stuarta(o,a,...) _hw___stuarta(_hw_read(o,csra)) HW_EOL(__VA_ARGS__)
263 
264 HW_INLINE _hw_uarta_stat_t _hw___stuarta ( uint8_t byte )
265 {
266  _hw_uarta_stat_t st ;
267  st.byte = byte ;
268  return st ;
269 }
270 
271 
272 /*******************************************************************************
273  * *
274  * Context management *
275  * *
276  *******************************************************************************/
277 
278 #define _hwa_setup__uarta(o,a) \
279  _hwa_setup_r( o, ubrr ); \
280  _hwa_setup_r( o, csra ); \
281  _hwa_setup_r( o, csrb ); \
282  _hwa_setup_r( o, csrc ); \
283  hwa->o.config.brr = 0 ; \
284  hwa->o.config.u2x = 0 ; \
285  hwa->o.config.csz = HW_A1(_hw_uarta_csz_8) ; \
286  hwa->o.config.pm = HW_A1(_hw_uarta_pm_none) ; \
287  hwa->o.config.sbs = HW_A1(_hw_uarta_sbs_1) ; \
288  hwa->o.config.rxen = 1 ; \
289  hwa->o.config.txen = 1
290 
291 #define _hwa_init__uarta(o,a) \
292  _hwa_init_r( o, ubrr, 0x00 ); \
293  _hwa_init_r( o, csra, 0x20 ); \
294  _hwa_init_r( o, csrb, 0x00 ); \
295  _hwa_init_r( o, csrc, 0x06 )
296 
297 #define _hwa_commit__uarta(o,a) \
298  _hwa_commit_r( o, ubrr ); \
299  _hwa_commit_r( o, csra ); \
300  _hwa_commit_r( o, csrb ); \
301  _hwa_commit_r( o, csrc )
302