HWA
Bare metal programming with style
dtga_2.h
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1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2012,2015 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
52 /* FIXME
53  *
54  * Perhaps it would be better to create one DTG attached to each compare unit
55  * and one shared DTG prescaler?
56  *
57  * * counter1compare0dtg
58  * * counter1compare1dtg
59  * * counter1dtgprescaler
60  *
61  * hw( configure, counter1compare0dtg,
62  * low, 2,
63  * high, 2 );
64  *
65  * hw( write, counter1dtgprescaler, 4 );
66  */
67 
68 #define hwa_configure__dtga , _hwa_cfdtga
69 
70 
71 #define _hwa_cfdtga(o,ct,oc,k,...) do { HW_BW(_hwx_cfdtga_kpsc_,prescaler,k)(_hwa,ct,oc,k,__VA_ARGS__) } while(0)
72 #define _hw_cfdtga(o,ct,oc,k,...) do { HW_BW(_hwx_cfdtga_kpsc_,prescaler,k)(_hw,ct,oc,k,__VA_ARGS__) } while(0)
73 /*
74  * Optionnal argument 'prescaler'
75  */
76 #define _hwx_cfdtga_kpsc_1(h,ct,oc,k,v,...) _HW_B(_hwx_cfdtga_vpsc_,HW_A0(_hw_dtga_vpsc_##v))(h,ct,oc,v,__VA_ARGS__)
77 #define _hwx_cfdtga_vpsc_0(h,ct,oc,v,...) HW_E(HW_EM_VAL(v,prescaler,(1,2,4,8)))
78 #define _hwx_cfdtga_vpsc_1(h,ct,oc,v,k,...) \
79  _hwa_write(ct,dtgps,HW_A1(_hw_dtga_vpsc_##v)); \
80  HW_BW(_hwx_cfdtga_kdlh_,delay_h,k)(h,ct,oc,k,__VA_ARGS__)
81 #define _hwx_cfdtga_kpsc_0(h,ct,oc,k,...) HW_BW(_hwx_cfdtga_kdlh_,delay_h,k)(h,ct,oc,k,__VA_ARGS__)
82 
83 #define _hw_dtga_kpsc_prescaler
84 #define _hw_dtga_vpsc_1 , 0
85 #define _hw_dtga_vpsc_2 , 1
86 #define _hw_dtga_vpsc_4 , 2
87 #define _hw_dtga_vpsc_8 , 3
88 /*
89  * Optionnal argument 'delay_h'
90  */
91 #define _hwx_cfdtga_kdlh_1(x,ct,oc,k0,v,k,...) \
92  if ( v>=0 && v<=15 ) \
93  x##_write(ct,dtg##oc##h,v); \
94  else \
95  HWA_E(HW_EM_VAL(v,delay_h,(0..15))); \
96  HW_BW(_hwx_cfdtga_kdll_,delay_l,k)(x,ct,oc,k,__VA_ARGS__)
97 
98 #define _hwx_cfdtga_kdlh_0(h,ct,oc,k,...) \
99  HW_BW(_hwx_cfdtga_kdll_,delay_l,k)(h,ct,oc,k,__VA_ARGS__)
100 /*
101  * Optionnal argument 'delay_l'
102  */
103 #define _hwx_cfdtga_kdll_1(h,ct,oc,k0,v,k,...) \
104  if ( v>=0 && v<=15 ) \
105  h##_write(ct,dtg##oc##l,v); \
106  else \
107  HWA_E(HW_EM_VAL(v,delay_l,(0..15))); \
108  HW_EOL(__VA_ARGS__)
109 
110 #define _hwx_cfdtga_kdll_0(h,ct,oc,k,...) \
111  HW_EOL(__VA_ARGS__)
112 
113 
114 /*******************************************************************************
115  * *
116  * Context management *
117  * *
118  *******************************************************************************/
119 
120 #define _hwa_setup__dtga(o,a) \
121  _hwa_setup_r( o, dtps ); \
122  _hwa_setup_r( o, dta ); \
123  _hwa_setup_r( o, dtb );
124 
125 #define _hwa_init__dtga(o,a) \
126  _hwa_init_r( o, dtps, 0x00 ); \
127  _hwa_init_r( o, dta, 0x00 ); \
128  _hwa_init_r( o, dtb, 0x00 );
129 
130 #define _hwa_commit__dtga(o,a) \
131  _hwa_commit_r(o,dtps); \
132  _hwa_commit_r(o,dta); \
133  _hwa_commit_r(o,dtb);
134 
135