HWA
Bare metal programming with style
pllb_2.h
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1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2021 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
12 #define _hw_actions__pllb , (configure,start,stop)
13 #define _hwa_actions__pllb , (configure,start,stop)
14 
38 #define hw_configure__pllb , _hw_cfpllb
39 #define _hw_cfpllb(...) \
40  do{ \
41  struct { uint8_t commit ; hwa_rccb_t rcc ; } hwa_st ; \
42  hwa_t *hwa = (hwa_t*)&hwa_st ; \
43  _hwa_setup_o(rcc); \
44  _hwa_cfpllb(__VA_ARGS__); \
45  hwa_st.commit = 1 ; _hwa_commit_o(rcc); \
46  }while(0)
47 
48 
49 #define hwa_configure__pllb , _hwa_cfpllb
50 #define _hwa_cfpllb(o,a,k,...) do{ HW_BW(_hwa_cfpllbin,input,k)(o,k,__VA_ARGS__) }while(0)
51 
52 /* Argument `input`
53  */
54 #define _hwa_cfpllbin0(o,k,...) HW_E(HW_EM_XNIL(k,(input)))
55 #define _hwa_cfpllbin1(o,k,v,...) HW_BV(_hwa_cfpllbin1,cfpllbin_,v,o,v) (o,__VA_ARGS__)// PUSH
56 
57 #define _hw_cfpllbin_hsi , 0, 1.0 // 0:HSI, 1.0/x
58 #define _hw_cfpllbin_hse , 1, 1.0 // 1:HSE, 1.0/x
59 
60 #define _hwa_cfpllbin10(v,...) HW_E(HW_EM_XNIL(v,(hse[/2..63],hsi[/2..63])))
61 #define _hwa_cfpllbin11(r,d,o,v) \
62  _hwa_write(o,src,r); \
63  _hwa_write(o,m,1.0/(d)); \
64  if ( 1.0/(d)<2 || 1.0/(d)>63 ) { HWA_E(HW_EM_VAL(v,input,(hse[/2..63],hsi[/2..63]))); } \
65  _hwa_cfpllbn // POP
66 
67 /* Argument `multiplier`
68  */
69 #define _hwa_cfpllbn(o,k,...) HW_BW(_hwa_cfpllbn,k,multiplier)(o,k,__VA_ARGS__)
70 #define _hwa_cfpllbn0(o,k,...) HW_E(HW_EM_XNIL(k,(multiplier)))
71 #define _hwa_cfpllbn1(o,ok,v,k,...) \
72  _hwa_write(o,n,v); \
73  if ( v<50 || v>432 ) { HWA_E(HW_EM_VAL(v,multiplier,(50..432))); } \
74  HW_BW(_hwa_cfpllbp,k,sysclkdiv)(o,k,__VA_ARGS__)
75 
76 #define _hwa_cfpllbp0(o,k,...) HW_E(HW_EM_XNIL(k,(sysclkdiv)))
77 #define _hwa_cfpllbp1(o,ok,v,k,...) \
78  if ( v==2 ) { _hwa_write(o,p,0); } \
79  else if ( v==4 ) { _hwa_write(o,p,1); } \
80  else if ( v==6 ) { _hwa_write(o,p,2); } \
81  else if ( v==8 ) { _hwa_write(o,p,3); } \
82  else { HWA_E(HW_EM_VAL(v,sysclkdiv,(2,4,6,8))); } \
83  HW_BW(_hwa_cfpllbq,k,48MHzdiv)(o,k,__VA_ARGS__)
84 
85 /* Optionnal argument `48MHzdiv`
86  */
87 #define _hwa_cfpllbq0(o,k,...) HW_B(_hwa_cfpllbq0,k)(o,k,__VA_ARGS__)
88 #define _hwa_cfpllbq00(o,k,...) HW_E(HW_EM_XNIL(k,(48MHzdiv)))
89 #define _hwa_cfpllbq01(...)
90 #define _hwa_cfpllbq1(o,ok,v,...) \
91  _hwa_write(o,q,v&0x0F); \
92  if ( v<2 || v>15 ) { HWA_E(HW_EM_VAL(v,48MHzdiv,(2..15))); } \
93  HW_EOL(__VA_ARGS__)
94 
108 #define hw_start__pllb , _hw_srpllb
109 #define _hw_srpllb(o,a,...) _hw_write(o,on,1) HW_EOL(__VA_ARGS__)
110 
111 #define hwa_start__pllb , _hwa_srpllb
112 #define _hwa_srpllb(o,a,...) _hwa_write(o,on,1) HW_EOL(__VA_ARGS__)
113 
114 #define hw_stop__pllb , _hw_sppllb
115 #define _hw_sppllb(o,a,...) _hw_write(o,on,0) HW_EOL(__VA_ARGS__)
116 
117 #define hwa_stop__pllb , _hwa_sppllb
118 #define _hwa_sppllb(o,a,...) _hwa_write(o,on,0) HW_EOL(__VA_ARGS__)
119 
120 
133 typedef struct {
134  unsigned int _0_24 : 25 ;
135  unsigned int ready : 1 ;
136  unsigned int _26_31 : 6 ;
137 } _hw_stpllb_t ;
138 
139 #define hw_stat_t__pllb , _hw_sttpllb
140 #define _hw_sttpllb(o,a,...) _hw_stpllb_t HW_EOL(__VA_ARGS__)
141 
142 #define hw_stat__pllb , _hw_stpllb
143 #define _hw_stpllb(o,a,g,...) HW_B(_hw_stpllb1_,g)(g)
144 #define _hw_stpllb1_0(g) HW_E(HW_EM_G(g))
145 #define _hw_stpllb1_1(g) (*(volatile _hw_stpllb_t*)HW_ADDRESS((rcc,cr)))