HWA
Bare metal programming with style
sab_2.h
Go to the documentation of this file.
1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2019 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
59 #define hw_class__sab
60 
61 #define hw_configure__sab , _hw_cfsab
62 #define _hw_cfsab(o,a,k,...) HW_B(_hwa_cfsab,k)(_hw,o,k,__VA_ARGS__)
63 
64 #define hwa_configure__sab , _hwa_cfsab
65 #define _hwa_cfsab(o,a,k,...) HW_B(_hwa_cfsab,k)(_hwa,o,k,__VA_ARGS__)
66 
67 /* At least one keyword
68  */
69 #define _hwa_cfsab1(h,o,k,...) HW_E(HW_EM_AML(([mode], [divider], [clockhz,bps,[tol]], \
70  [databits], [parity], [stopbits], [cts], \
71  [rts], [receiver], [transmitter])))
72 #define _hwa_cfsab0(h,o,k,...) do{ HW_BW(_hwa_cfsabmd,mode,k)(h,o,k,__VA_ARGS__); }while(0)
73 
74 /* 'mode'
75  */
76 #define _hwa_cfsabmd0 _hwa_cfsabadv
77 #define _hwa_cfsabmd1(h,o,k,v,...) HW_BV(_hwa_cfsabmd1,sabmd_,v,) (h,o,__VA_ARGS__)//PUSH
78 #define _hwa_cfsabmd10(v,...) HW_E(HW_EM_XNIL(v,(uart))) HW_EAT//POP
79 #define _hwa_cfsabmd11(f,...) f//POP
80 
81 #define _hw_sabmd_uart , _hwa_cfsabadv
82 
83 /* 'divider'
84  */
85 #define _hwa_cfsabadv(h,o,k,...) HW_BW(_hwa_cfsabadv,divider,k)(h,o,k,__VA_ARGS__)
86 #define _hwa_cfsabadv0 _hwa_cfsaback
87 #define _hwa_cfsabadv1(h,o,k,v,...) h##_write(o,brr,v); _hwa_cfsabadb(h,o,__VA_ARGS__)
88 
89 /* 'clockhz'
90  */
91 #define _hwa_cfsaback(h,o,k,...) HW_BW(_hwa_cfsaback,clockhz,k)(h,o,k,__VA_ARGS__)
92 #define _hwa_cfsaback0 _hwa_cfsabadb
93 #define _hwa_cfsaback1(h,o,k0,v,k,...) \
94  uint32_t clockhz __attribute__((unused)); \
95  uint32_t bps __attribute__((unused)); \
96  float tol __attribute__((unused)); \
97  clockhz=v; HW_BW(_hwa_cfsababr,bps,k)(h,o,k,__VA_ARGS__)
98 
99 /* 'bps'
100  */
101 #define _hwa_cfsababr0(h,o,k,...) HW_E(HW_EM_XWW(k,clockhz,bps))
102 #define _hwa_cfsababr1(h,o,k0,v,k,...) bps=v; HW_BW(_hwa_cfsabatl,tol,k)(h,o,k,__VA_ARGS__)
103 
104 /* 'tol'
105  */
106 #define _hwa_cfsabatl0 tol=0; _hwa_cfsabatl2
107 #define _hwa_cfsabatl1(h,o,k0,v,k,...) tol=v; _hwa_cfsabatl2(h,o,k,__VA_ARGS__)
108 #define _hwa_cfsabatl2 \
109  uint32_t brr = int(clockhz*1.0/bps * 16.0 + 0.5); \
110  tol=tol; \
111  _hwa_cfsabadb
112 
113 /* 'databits'
114  */
115 #define _hwa_cfsabadb(h,o,k,...) HW_BW(_hwa_cfsabadb,databits,k)(h,o,k,__VA_ARGS__)
116 #define _hwa_cfsabadb0 _hwa_cfsabapy
117 #define _hwa_cfsabadb1(h,o,k,v,...) \
118  if ( v==8 ) h##_write(o,m,0); \
119  else if ( v==9 ) h##_write(o,m,1); \
120  else HWA_E(HW_EM_VAL(v,databits,(8,9))); \
121  _hwa_cfsabapy(h,o,__VA_ARGS__)
122 
123 /* 'parity'
124  */
125 #define _hwa_cfsabapy(h,o,k,...) HW_BW(_hwa_cfsabapy,parity,k)(h,o,k,__VA_ARGS__)
126 #define _hwa_cfsabapy0 _hwa_cfsabasb
127 #define _hwa_cfsabapy1(h,o,k,v,...) HW_BV(_hwa_cfsabapy1,sabapy_,v,h,o)(h,o,__VA_ARGS__)//PUSH
128 #define _hwa_cfsabapy10(v,h,o) HW_E(HW_EM_XNIL(v,(none, even, odd))) HW_EAT//POP
129 #define _hwa_cfsabapy11(r,h,o) h##_write(o,pceps,r); _hwa_cfsabasb//POP
130 
131 // PCE PS
132 #define _hw_sabapy_none , 0
133 #define _hw_sabapy_even , 1
134 #define _hw_sabapy_odd , 3
135 
136 /* 'stopbits'
137  */
138 #define _hwa_cfsabasb(h,o,k,...) HW_BW(_hwa_cfsabasb,stopbits,k)(h,o,k,__VA_ARGS__)
139 #define _hwa_cfsabasb0 _hwa_cfsabarx
140 #define _hwa_cfsabasb1(h,o,k,v,...) \
141  if ( v==1.0 ) h##_write(o,stop,0); \
142  else if ( v==0.5 ) h##_write(o,stop,1); \
143  else if ( v==2.0 ) h##_write(o,stop,2); \
144  else if ( v==1.5 ) h##_write(o,stop,3); \
145  else HWA_E(HW_EM_VAL(v,stopbits,(0.5, 1, 1.5, 2))); \
146  _hwa_cfsabarx(h,o,__VA_ARGS__)
147 
148 /* 'cts'
149  */
150 #define _hwa_cfsabacs(h,o,k,...) HW_BW(_hwa_cfsabacs,cts,k)(h,o,k,__VA_ARGS__)
151 #define _hwa_cfsabacs0 _hwa_cfsabarx
152 #define _hwa_cfsabacs1(h,o,k,v,...) HW_BV(_hwa_cfsabacs1,state_,v,h,o)(h,o,__VA_ARGS__)
153 #define _hwa_cfsabacs10(v,h,o) HW_E(HW_EM_ST(v)) HW_EAT
154 #define _hwa_cfsabacs11(r,n,h,o) h##_write(o,ctse,r); _hwa_cfsabars
155 
156 /* 'rts'
157  */
158 #define _hwa_cfsabars(h,o,k,...) HW_BW(_hwa_cfsabars,rts,k)(h,o,k,__VA_ARGS__)
159 #define _hwa_cfsabars0 _hwa_cfsabarx
160 #define _hwa_cfsabars1(h,o,k,v,...) HW_BV(_hwa_cfsabars1,state_,v,h,o)(h,o,__VA_ARGS__)
161 #define _hwa_cfsabars10(v,h,o) HW_E(HW_EM_ST(v)) HW_EAT
162 #define _hwa_cfsabars11(r,n,h,o) h##_write(o,rtse,r); _hwa_cfsabarx
163 
164 /* 'receiver'
165  */
166 #define _hwa_cfsabarx(h,o,k,...) HW_BW(_hwa_cfsabarx,receiver,k)(h,o,k,__VA_ARGS__)
167 #define _hwa_cfsabarx0 _hwa_cfsabatx
168 #define _hwa_cfsabarx1(h,o,k,v,...) HW_BV(_hwa_cfsabarx1,state_,v,h,o)(h,o,__VA_ARGS__)
169 #define _hwa_cfsabarx10(v,h,o) HW_E(HW_EM_ST(v)) HW_EAT
170 #define _hwa_cfsabarx11(r,n,h,o) h##_write(o,re,r); _hwa_cfsabatx
171 
172 /* 'transmitter'
173  */
174 #define _hwa_cfsabatx(h,o,k,...) HW_BW(_hwa_cfsabatx,transmitter,k)(h,o,k,__VA_ARGS__)
175 #define _hwa_cfsabatx0 _hwa_cfsabarn
176 #define _hwa_cfsabatx1(h,o,k,v,...) HW_BV(_hwa_cfsabatx1,state_,v,h,o)(h,o,__VA_ARGS__)
177 #define _hwa_cfsabatx10(v,h,o) HW_E(HW_EM_ST(v)) HW_EAT
178 #define _hwa_cfsabatx11(r,n,h,o) h##_write(o,te,r); _hwa_cfsabarn
179 
180 /* 'run'
181  */
182 #define _hwa_cfsabarn(h,o,k,...) HW_BW(_hwa_cfsabarn,run,k)(h,o,k,__VA_ARGS__)
183 #define _hwa_cfsabarn0(h,o,...) HW_EOL(__VA_ARGS__)
184 #define _hwa_cfsabarn1(h,o,k,v,...) HW_BV(_hwa_cfsabarn1,state_,v,h,o)(__VA_ARGS__)
185 #define _hwa_cfsabarn10(v,h,o) HW_E(HW_EM_ST(v)) HW_EAT
186 #define _hwa_cfsabarn11(r,n,h,o) h##_write(o,ue,r); HW_EOL
187 
188 
189 /* #define _hw_is_bps_bps , 1 */
190 #define _hw_is_tol_tol , 1
191 #define _hw_is_clockhz_clockhz , 1
192 #define _hw_is_divider_divider , 1
193 
194 
195 /*******************************************************************************
196  * *
197  * HWA context *
198  * *
199  *******************************************************************************/
200 
201 #define _hwa_setup__sab(o,a) \
202  _hwa_setup_r( o, brr ); \
203  _hwa_setup_r( o, cr1 ); \
204  _hwa_setup_r( o, cr2 ); \
205  _hwa_setup_r( o, cr3 ); \
206  _hwa_setup_r( o, gtpr )
207 
208 #define _hwa_init__sab(o,a) \
209  _hwa_init_r( o, brr, 0x00000000 ); \
210  _hwa_init_r( o, cr1, 0x00000000 ); \
211  _hwa_init_r( o, cr2, 0x00000000 ); \
212  _hwa_init_r( o, cr3, 0x00000000 ); \
213  _hwa_init_r( o, gtpr, 0x00000000 )
214 
215 #define _hwa_commit__sab(o,a) \
216  _hwa_commit_r( o, brr ); \
217  _hwa_commit_r( o, cr1 ); \
218  _hwa_commit_r( o, cr2 ); \
219  _hwa_commit_r( o, cr3 ); \
220  _hwa_commit_r( o, gtpr )