HWA
Bare metal programming with style
spia_2.h
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1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2012,2015 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
52 #define hwa_configure__spia , _hwa_cfspia
53 
54 #define _hwa_cfspia(o,a,k,...) \
55  do { \
56  const float ioclk = 1.0 ; \
57  HW_B(_hwa_cfspia_kfunction_,_hw_is_function_##k)(o,k,__VA_ARGS__,,); \
58  } while(0)
59 
60 /* Mandatory parameter `function`
61  */
62 #define _hwa_cfspia_kfunction_0(o,k,...) HW_E(HW_EM_AN(k,function))
63 #define _hwa_cfspia_kfunction_1(o,k,v,...) HW_B(_hwa_cfspia_vfunction_,_hw_spia_function_##v)(o,v,__VA_ARGS__)
64 #define _hwa_cfspia_vfunction_0(o,v,...) HW_E(HW_EM_VAL(v,function,(master,slave,off)))
65 #define _hwa_cfspia_vfunction_1(o,v,k,...) \
66  _hwa_write(o,en, HW_A1(_hw_spia_function_##v)); \
67  _hwa_write(o,mstr, HW_A2(_hw_spia_function_##v)); \
68  if ( HW_A1(_hw_spia_function_##v) == 1 ) { \
69  if ( HW_A2(_hw_spia_function_##v) == 0 ) { \
70  _hwa( configure, (o,miso), mode, digital_output ); \
71  } else { \
72  _hwa( configure, (o,mosi), mode, digital_output ); \
73  _hwa( configure, (o,sck), mode, digital_output ); \
74  } \
75  } \
76  HW_B(_hwa_cfspia_kclock_,_hw_is_clock_##k)(o,k,__VA_ARGS__)
77 
78 #define _hw_spia_function_master , 1, 1 /* , en , mstr */
79 #define _hw_spia_function_slave , 1, 0
80 #define _hw_spia_function_off , 0, 0
81 
82 /* Mandatory parameter `clock`
83  */
84 #define _hwa_cfspia_kclock_0(o,k,...) HW_E(HW_EM_AN(k,clock))
85 #define _hwa_cfspia_kclock_1(o,k,v,...) HW_B(_hwa_cfspia_vclock_,_hw_is_ioclk_##v)(o,v,__VA_ARGS__)
86 #define _hwa_cfspia_vclock_0(o,v,...) HW_E(HW_EM_VAL(v,clock,(ioclk/24,ioclk/8,ioclk/16,ioclk/32,ioclk/64,ioclk/128)))
87 #define _hwa_cfspia_vclock_1(o,v,k,...) \
88  _hwa_write(o,xpr, _hwa_cpspia_clk(v)); \
89  HW_G2(_hwa_cfspia_kmode,HW_IS(mode,k))(o,k,__VA_ARGS__)
90 
91 HW_INLINE uint8_t _hwa_cpspia_clk ( float v )
92 {
93  if ( v == 1.0 / 2 )
94  return 4 ;
95  else if ( v == 1.0 / 4 )
96  return 0 ;
97  else if ( v == 1.0 / 8 )
98  return 5 ;
99  else if ( v == 1.0 / 16 )
100  return 1 ;
101  else if ( v == 1.0 / 32 )
102  return 6 ;
103  else if ( v == 1.0 / 64 )
104  return 2 ;
105  else if ( v == 1.0 / 128 )
106  return 3 ;
107  else
108  HWA_E(HW_EM_AVL(clock,(none, ioclk/(2, 4, 8, 32, 64, 128))));
109  return 0 ;
110 }
111 
112 /* Optionnal parameter `mode`
113  */
114 #define _hwa_cfspia_kmode_0(o,k,...) HW_G2(_hwa_cfspia_kidle,HW_IS(idle_state,k))(o,k,__VA_ARGS__)
115 #define _hwa_cfspia_kmode_1(o,k,v,...) HW_B(_hwa_cfspia_vmode_,_hw_spia_mode_##v)(o,v,__VA_ARGS__)
116 #define _hwa_cfspia_vmode_0(o,v,...) HW_E(HW_EM_VAL(v,mode,(0,1,2,3)))
117 #define _hwa_cfspia_vmode_1(o,v,k,...) \
118  _hwa_write(o,mode,HW_A1(_hw_spia_mode_##v)); \
119  HW_G2(_hwa_cfspia_korder,HW_IS(data_order,k))(o,k,__VA_ARGS__)
120 
121 #define _hw_spia_mode_0 , 0 /* , mode */
122 #define _hw_spia_mode_1 , 1
123 #define _hw_spia_mode_2 , 2
124 #define _hw_spia_mode_3 , 3
125 
126 /* Optionnal parameter `idle_state`
127  */
128 #define _hw_spia_idle_low , 0 /* , cpol */
129 #define _hw_spia_idle_high , 1
130 
131 #define _hwa_cfspia_kidle_0(o,k,...) HW_G2(_hwa_cfspia_korder,HW_IS(data_order,k))(o,k,__VA_ARGS__)
132 #define _hwa_cfspia_kidle_1(o,k,v,...) HW_B(_hwa_cfspia_vidle_,_hw_spia_idle_##v)(o,v,__VA_ARGS__)
133 #define _hwa_cfspia_vidle_0(o,v,...) HW_E(HW_EM_VAL(v,idle_state,(low,high)))
134 #define _hwa_cfspia_vidle_1(o,v,k,...) \
135  _hwa_write(o,cpol, HW_A1(_hw_spia_idle_##v)); \
136  HW_G2(_hwa_cfspia_ksampling,HW_IS(sampling_edge,k))(o,v,k,__VA_ARGS__)
137 
138 /* Mandatory parameter `sampling_edge` following `idle_state`
139  */
140 #define _hw_spia_idle_low_sampling_rising , 0 /* , cpol */
141 #define _hw_spia_idle_low_sampling_falling , 1
142 #define _hw_spia_idle_high_sampling_rising , 1
143 #define _hw_spia_idle_high_sampling_falling , 0
144 
145 #define _hwa_cfspia_ksampling_0(o,v,k,...) HW_E(HW_EM_AN(k,sampling_edge))
146 #define _hwa_cfspia_ksampling_1(o,i,k,v,...) HW_G2(_hwa_cfspia_vsampling,HW_IS(,_hw_spia_idle_##i##_sampling_##v))(o,i,v,__VA_ARGS__)
147 #define _hwa_cfspia_vsampling_0(o,i,v,...) HW_E(HW_EM_VAL( v,sampling_edge,( rising))))
148 #define _hwa_cfspia_vsampling_1(o,i,v,k,...) \
149  _hwa_write(o,cpha, HW_A1(_hw_spia_idle_##i##_sampling_##v)); \
150  HW_G2(_hwa_cfspia_korder,HW_IS(data_order,k))(o,k,__VA_ARGS__)
151 
152 /* Optionnal parameter `data_order`
153  */
154 #define _hwa_cfspia_korder_0(o,...) HW_EOL(__VA_ARGS__)
155 #define _hwa_cfspia_korder_1(o,k,v,...) HW_B(_hwa_cfspia_vorder_,_hw_spia_order_##v)(o,v,__VA_ARGS__)
156 #define _hwa_cfspia_vorder_0(o,v,...) HW_E(HW_EM_VAL(v,order,(lsb_first,msb_first)))
157 #define _hwa_cfspia_vorder_1(o,v,k,...) \
158  _hwa_write(o,dord,HW_A1(_hw_spia_order_##v)); \
159  HW_EOL(__VA_ARGS__)
160 
161 #define _hw_spia_order_msb_first , 0 /* , order */
162 #define _hw_spia_order_lsb_first , 1
163 
164 
174 #define hw_read__spia , _hw_read_spia
175 #define _hw_read_spia(o,a,...) _hw_read(o,dr) HW_EOL(__VA_ARGS__)
176 
177 
187 #define hw_write__spia , _hw_wrspia
188 #define _hw_wrspia(o,a,v,...) _hw_write(o,dr,v) HW_EOL(__VA_ARGS__)
189 
190 /* #define _hw_wrspia(o,a,v,...) \ */
191 /* _hw___wrspia( _hw_rap(o,if), HW_ADDRESS((o,dr)), v ) HW_EOL(__VA_ARGS__) */
192 
193 /* HW_INLINE uint8_t _hw___wrspia( intptr_t flag_addr, uint8_t flag_bp, intptr_t dr, uint8_t v ) */
194 /* { */
195 /* uint8_t flag = 1U<<flag_bp ; */
196 /* *(volatile uint8_t*)dr = v ; */
197 /* while (1) { */
198 /* uint8_t sr = *(volatile uint8_t*)flag_addr ; */
199 /* if ( sr & flag ) */
200 /* return *(volatile uint8_t*)dr ; */
201 /* } */
202 /* } */
203 
204 /* /\** */
205 /* * atmelavr_spia */
206 /* * @code */
207 /* * hwa( write, spi0, value ); */
208 /* * @endcode */
209 /* *\/ */
210 /* #define hwa_write__spia , _hwa_write_spia */
211 /* #define _hwa_write_spia(o,a,v) _hwa_write(o,dr,v) */
212 
213 
227 #define hw_turn__spia , _hw_turn_spia
228 
229 #define _hw_turn_spia(o,a,k,...) \
230  HW_B(_hw_turn_spia_,_hw_state_##k)(o,k,__VA_ARGS__)
231 #define _hw_turn_spia_0(o,v, ...) \
232  HW_E(HW_EM_ST(v))
233 #define _hw_turn_spia_1(o,v, ...) \
234  _hw_write(o, en, HW_A1(_hw_state_##v)) HW_EOL(__VA_ARGS__)
235 
236 #define hwa_turn__spia , _hwa_turn_spia
237 
238 #define _hwa_turn_spia(o,a,k,...) \
239  HW_B(_hwa_turn_spia_,_hw_state_##k)(o,k,__VA_ARGS__)
240 #define _hwa_turn_spia_0(o,v, ...) \
241  HW_E(HW_EM_ST(v))
242 #define _hwa_turn_spia_1(o,v, ...) \
243  _hwa_write(o, en, HW_A1(_hw_state_##v)) HW_EOL(__VA_ARGS__)
244 
245 
277 #define hw_stat__spia , _hw_stat_spia
278 #define hw_stat_t__spia , _hw_statt_spia
279 
280 #define _hw_statt_spia(o,a,...) _hw_spia_stat_t HW_EOL(__VA_ARGS__)
281 
282 typedef union {
283  uint8_t byte ;
284  struct {
285  unsigned int _0_5 : 6 ;
286  unsigned int collision : 1 ;
287  unsigned int _7 : 1 ;
288  };
289 } _hw_spia_stat_t ;
290 
291 #define _hw_stat_spia(o,a,...) _hw_spia_stat(_hw_read(o, sr)) HW_EOL(__VA_ARGS__)
292 
293 HW_INLINE _hw_spia_stat_t _hw_spia_stat( uint8_t byte )
294 {
295  _hw_spia_stat_t st ;
296  st.byte = byte ;
297  return st ;
298 }
299 
300 
301 /*******************************************************************************
302  * *
303  * Context management *
304  * *
305  *******************************************************************************/
306 
307 #define _hwa_setup__spia(o,a) \
308  _hwa_setup_r( o, cr ); \
309  _hwa_setup_r( o, sr )
310 
311 #define _hwa_init__spia(o,a) \
312  _hwa_init_r( o, cr, 0x00 ); \
313  _hwa_init_r( o, sr, 0x00 )
314 
315 #define _hwa_commit__spia(o,a) \
316  _hwa_commit_r( o, cr ); \
317  _hwa_commit_r( o, sr )
318 
319 
320 
HWA_E
#define HWA_E(...)
Trigger an error after code optimization.
Definition: hwa_2.h:17