HWA
Bare metal programming with style
ioa_1.h
Go to the documentation of this file.
1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2017 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
19 #define hw_class__ioa
20 
21 
30 #define hw__ioa_port , _hw_ioa_port
31 #define _hw_ioa_port(o,p,...) _hw_ioa_port1(p,hw_##p)
32 #define _hw_ioa_port1(...) _hw_ioa_port2(__VA_ARGS__)
33 #define _hw_ioa_port2(p,c,...) c,p,(__VA_ARGS__)
34 
35 
55 #define HW_ADDRESS__ioa , _hw_adioa
56 #define _hw_adioa(o,p,bn,bp,...) _hw_adioa01(hw_##p,bn,bp)
57 #define _hw_adioa01(...) _hw_adioa02(__VA_ARGS__)
58 #define _hw_adioa02(c,a,bn,bp) (a+(bn-1)*16+bp)
59 
60 
71 #define HW_BITS__ioa , _hw_btioa
72 #define _hw_btioa(o, cn,bn,bp,...) bn
73 
74 
85 #define HW_POSITION__ioa , _hw_pnioa
86 #define _hw_pnioa(o, cn,bn,bp,...) bp
87 
88 
89 /* Access 'mode' bits in crl/crh from a pin. [_HW_OX26]
90  */
91 /* #define hw__ioa_mode , _hw_ioa_mode */
92 
93 /* #define _hw_ioa_mode(...) _hw_ioa_mode10(__VA_ARGS__) */
94 /* #define _hw_ioa_mode10(o,p,bn,bp) HW_B(_hw_ioa_mode10_,_hw_is_1_##bn)(o,p,bn,bp) */
95 /* #define _hw_ioa_mode10_0(o,p,bn,bp) ,o,HW_EM(is not a single pin) */
96 /* #define _hw_ioa_mode10_1(o,p,bn,bp) _hw_ioa_mode20(bp,hw__gpa_mode##bp,p,hw_##p) */
97 /* #define _hw_ioa_mode20(...) _hw_ioa_mode21(__VA_ARGS__) */
98 /* #define _hw_ioa_mode21(bp,rc,r,rbn,rbp,p,pc,pa) HW_OXR(rc,,r,rbn,rbp,pc,p,pa) */
99 
100 
101 /* Access 'cnf' bits in crl/crh from a pin. [_HW_OX26]
102  */
103 /* #define hw__ioa_cnf , _hw_ioa_cnf */
104 
105 /* #define _hw_ioa_cnf(...) _hw_ioa_cnf10(__VA_ARGS__) */
106 /* #define _hw_ioa_cnf10(o,p,bn,bp) HW_B(_hw_ioa_cnf10_,_hw_is_1_##bn)(o,p,bn,bp) */
107 /* #define _hw_ioa_cnf10_0(o,p,bn,bp) ,o,HW_EM("is not a single pin") */
108 /* #define _hw_ioa_cnf10_1(o,p,bn,bp) _hw_ioa_cnf20(bp,hw__gpa_cnf##bp,p,hw_##p) */
109 /* #define _hw_ioa_cnf20(...) _hw_ioa_cnf21(__VA_ARGS__) */
110 /* #define _hw_ioa_cnf21(bp,rc,r,rbn,rbp,p,pc,pa) HW_OXR(rc,,r,rbn,rbp,pc,p,pa) */
111 
112 
113 /* Accept to append a number to a _ioa definition so that:
114  * * (portx,n) becomes a single pin at position n of portx.
115  * * (portx,n,p) becomes a set of n consecutive pins at position p of portx.
116  */
117 #define hw__ioa_ , _hw_ioa_
118 #define _hw_ioa_(o,r,p,bn,bp) _HW_B(_hw_ioa_,_hw_is_1_##bn)(o,r,p,bn,bp)
119 #define _hw_ioa_0(o,r,...) ,(o,r),HW_EM(o has no relative r)
120 #define _hw_ioa_1(o,r,p,bn,bp) _HW_B(_hw_ioa1_,_hw_isa_4bn_##r)(o,r,p,bn,bp)
121 #define _hw_ioa1_1(o,r,p,bn,bp) _ioa,p##_##bp##_##r,(p,bp,r)
122 #define _hw_ioa1_0(o,r,p,bn,bp) _hw_ioa10(o,r,p,bn,bp,hw_##p##_##bn##_##bp##_##r)
123 #define _hw_ioa10(...) _hw_ioa11(__VA_ARGS__)
124 #define _hw_ioa11(o,r,p,bn,bp,...) _HW_B(_hw_ioa2,_hw_isa_reg_##__VA_ARGS__)(o,r,p,bn,bp,__VA_ARGS__)
125 #define _hw_ioa21(o,r,p,bn,bp,cr,...) HW_OXR(cr,r,__VA_ARGS__,_ioa,o,__VA_ARGS__)
126 #define _hw_ioa20(o,r,p,bn,bp,...) _hw_ioa22(o,r,p,bn,bp,HW_XO(__VA_ARGS__))
127 #define _hw_ioa22(...) _hw_ioa23(__VA_ARGS__)
128 #define _hw_ioa23(o,r,p,bn,bp,x,...) _HW_B(_hw_ioa23,x)(o,r,p,bn,bp,x,__VA_ARGS__)
129 #define _hw_ioa231(o,r,p,bn,bp,...) ,(o),HW_EM(o has no relative r)
130 #define _hw_ioa230(o,r,p,bn,bp,...) __VA_ARGS__