HWA
Bare metal programming with style
Class _ada: 10-bit analog to digital converter

This class is used by:

Features

Interrupts

Actions



hwa( configure, ... ) configures the ADC.

Single-end mode:

hwa( configure, adc0,
// Clock source: the resulting clock frequency should be in
// the 50..200 kHz range for maximum resolution, and in all
// case lower than 1 MHz.
//
clock, min // choose the nearest 50 kHz
| max // choose the nearest 200 kHz
| ioclk / 2**(1..7), // IOCLK divided by 2,4,..,128
// How a conversation is started
//
trigger, manual // Use hw(trigger,adc0)
| auto // as soon as a conversion is completed
| (acmp0,irq) // Other trigger sources
| (int0,irq) //
| (counter0,compare0,irq) //
| (counter0,overflow,irq) //
| (counter1,compare1,irq) //
| (counter1,overflow,irq) //
| (counter1,capture,irq), //
// Voltage reference
//
vref, vcc // Vcc
| (pin,aref) // Voltage on AREF pin
| bandgap_1100mV, // Internal 1.1V bandgap
// Result alignment (default is `right`)
//
[ align, left
| right, ]
// Input
//
input, (pin,adc0..7)
| gnd
| bandgap
| temperature );

The differential mode allows the use of the 20x gain stage:

hwa( configure, adc0,
clock, ... , // See above
trigger, ... , //
vref, ... , //
[ align, ... , ] //
[ polarity, unipolar // Default
| bipolar, ]
[ gain, 1 // Default
| 20, ]
positive_input, (pin,adc0..7) // HWA will trigger an error if you
// try to use a combination of inputs
negative_input, (pin,adc0..7) // that is not available
);
Note
The ADC and the analog comparator share the same output of the analog multiplexer. The ADC is disabled after reset. Configuring the ADC automatically enables it. When the ADC is enabled, the analog comparator acmp0 can not use the analog multiplexer output. Use hw(disable,adc0) to disable the ADC and let acmp0 use the analog multiplexer output.



hw( enable, ... ) / hwa( enable, ... ) enables the ADC.

hw( enable, adc0 );
hwa( enable, adc0 );



hw( disable, ... ) / hwa( disable, ... ) disables the ADC.

hw( disable, adc0 );
hwa( disable, adc0 );



hw( trigger, ... ) / hwa( trigger, ... ) starts a conversion.

hw( trigger, adc0 );
hwa( trigger, adc0 );



hw( read, ... ) returns the result of the conversion.

uint16_t adc = hw( read, adc0 );



hw( read_atomic, ... ) returns the result of the conversion after having cleared the I bit of the status register and set it again as soon as possible.

uint16_t adc = hw( read_atomic, adc0 );



hw( stat, ... ) returns the status of the ADC, that contains a single 'busy' bit.

hw_stat_t(adc0) st ;
st = hw(stat,adc0);
if ( !st.busy ) // No conversion pending?
hw( trigger, adc0 ); // Trigger one

You'll use the IRQ flag to test whether a conversion is completed:

hw( trigger, adc0 );
while ( !hw( read, (adc0,irq) ) ) {}
hw( clear, (adc0,irq) );
uint16_t result = hw( read, adc0 );

Registers

Hardware registers:

Logical registers:

hwa
#define hwa(...)
hwa( action, object [,...] ) stores an action for an object into a HWA context.
Definition: hwa_macros.h:552
hw
#define hw(...)
hw( action, object [,...] ) executes an action immediately on an object.
Definition: hwa_macros.h:523
hw_stat_t
#define hw_stat_t(object)
Declares the appropriate structure that holds the status of an object.
Definition: hwa_macros.h:711