HWA
Bare metal programming with style
nvica_2.h
Go to the documentation of this file.
1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2017 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
34 #define hw_enable__nvi , _hw_nvien
35 #define _hw_nvien(a,...) _hw_nvic_enable(a)
36 
37 #define hwa_enable__nvi , _hwa_nvien
38 #define _hwa_nvien(a,...) _hwa_nvic_enable(hwa,a)
39 
40 #define hw_disable__nvi , _hw_nvids
41 #define _hw_nvids(a,...) _hw_nvic_enable(a)
42 
43 #define hwa_disable__nvi , _hwa_nvids
44 #define _hwa_nvids(a,...) _hwa_nvic_enable(hwa,a)
45 
46 
47 HW_INLINE void _hw_nvic_enable ( uint8_t v )
48 {
49  if ( v < 32 )
50  _hw_write_m(nvic, iser0, (1UL<<v), (1UL<<v));
51  else if ( v < 64 )
52  _hw_write_m(nvic, iser1, (1UL<<(v-32)), (1UL<<(v-32)));
53  else if ( v < 96 )
54  _hw_write_m(nvic, iser2, (1UL<<(v-64)), (1UL<<(v-64)));
55  else
56  HWA_E(HW_EM_X([nvica2.h:_hw_nvic_enable()]interrupt not supported));
57 }
58 
59 HW_INLINE void _hwa_nvic_enable ( hwa_t *hwa, uint8_t v )
60 {
61  if ( v < 32 )
62  _hwa_write_m(nvic, iser0, (1UL<<v), (1UL<<v));
63  else if ( v < 64 )
64  _hwa_write_m(nvic, iser1, (1UL<<(v-32)), (1UL<<(v-32)));
65  else if ( v < 96 )
66  _hwa_write_m(nvic, iser2, (1UL<<(v-64)), (1UL<<(v-64)));
67  else
68  HWA_E(HW_EM_X([nvica2.h:_hwa___nvic_enable()]interrupt not supported));
69 }
70 
71 HW_INLINE void _hw_nvic_disable ( uint8_t v )
72 {
73  if ( v < 32 )
74  _hw_write_m(nvic, icer0, (1UL<<v), (1UL<<v));
75  else if ( v < 64 )
76  _hw_write_m(nvic, icer1, (1UL<<(v-32)), (1UL<<(v-32)));
77  else if ( v < 96 )
78  _hw_write_m(nvic, icer2, (1UL<<(v-64)), (1UL<<(v-64)));
79  else
80  HWA_E(HW_EM_X([nvica2.h:_hw_nvic_disable()]interrupt not supported));
81 }
82 
83 HW_INLINE void _hwa_nvic_disable ( hwa_t *hwa, uint8_t v )
84 {
85  if ( v < 32 )
86  _hwa_write_m(nvic, icer0, (1UL<<v), (1UL<<v));
87  else if ( v < 64 )
88  _hwa_write_m(nvic, icer1, (1UL<<(v-32)), (1UL<<(v-32)));
89  else if ( v < 96 )
90  _hwa_write_m(nvic, icer2, (1UL<<(v-64)), (1UL<<(v-64)));
91  else
92  HWA_E(HW_EM_X([nvica2.h:_hwa___nvic_disable()]interrupt not supported));
93 }
94 
95 
105 #define hw_clear__nvi , _hw_clrnvi
106 #define _hw_clrnvi(a,...) _hw_nvic_clear(a) HW_EOL(__VA_ARGS__)
107 
108 
109 HW_INLINE void _hw_nvic_clear ( uint8_t v )
110 {
111  if ( v < 32 )
112  _hw_write_m(nvic, icpr0, (1UL<<v), (1UL<<v));
113  else if ( v < 64 )
114  _hw_write_m(nvic, icpr1, (1UL<<(v-32)), (1UL<<(v-32)));
115  else if ( v < 96 )
116  _hw_write_m(nvic, icpr2, (1UL<<(v-64)), (1UL<<(v-64)));
117  else
118  HWA_E(HW_EM_X([nvica2.h:_hw_nvic_clear()]interrupt not supported));
119 }
120 
121 
122 /*******************************************************************************
123  * *
124  * Context management *
125  * *
126  *******************************************************************************/
127 
128 #define _hwa_setup__nvica(o,a) \
129  _hwa_setup_r( o, iser0 ); \
130  _hwa_setup_r( o, iser1 ); \
131  _hwa_setup_r( o, iser2 ); \
132  _hwa_setup_r( o, icer0 ); \
133  _hwa_setup_r( o, icer1 ); \
134  _hwa_setup_r( o, icer2 ); \
135 
136 #define _hwa_init__nvica(o,a) \
137  _hwa_init_r( o, iser0, 0x00000000 ); \
138  _hwa_init_r( o, iser1, 0x00000000 ); \
139  _hwa_init_r( o, iser2, 0x00000000 ); \
140  _hwa_init_r( o, icer0, 0x00000000 ); \
141  _hwa_init_r( o, icer1, 0x00000000 ); \
142  _hwa_init_r( o, icer2, 0x00000000 ); \
143 
144 #define _hwa_commit__nvica(o,a) \
145  _hwa_commit_r( o, iser0 ); \
146  _hwa_commit_r( o, iser1 ); \
147  _hwa_commit_r( o, iser2 ); \
148  _hwa_commit_r( o, icer0 ); \
149  _hwa_commit_r( o, icer1 ); \
150  _hwa_commit_r( o, icer2 )
_hw_write_m
#define _hw_write_m(o, r,...)
Write some bits of a hardware register.
Definition: hwa_2.h:280
hwa
#define hwa(...)
hwa( action, object [,...] ) stores an action for an object into a HWA context.
Definition: hwa_macros.h:552
HWA_E
#define HWA_E(...)
Trigger an error after code optimization.
Definition: hwa_2.h:17
_hwa_write_m
#define _hwa_write_m(o, r,...)
Record some bits of a hardware register in the HWA context.
Definition: hwa_2.h:298