HWA
Bare metal programming with style
stm32f103.h
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1 
2 /* This file is part of the HWA project.
3  * Copyright (c) 2017 Christophe Duparquet.
4  * All rights reserved. Read LICENSE.TXT for details.
5  */
6 
22 #include "../hwa_1.h"
23 
77 #define HW_DEVICE_STM32F103
78 
82 #define HW_DEVICE_HSIHZ 8000000
83 
87 #define HW_DEVICE_LSIHZ 40000
88 
93 /*******************************************************************************
94  * *
95  * Exception & interrupt vectors *
96  * *
97  *******************************************************************************/
98 
99 #define _hw_isr_nmi_ _isr, , hw_esr_nmi
100 #define _hw_isr_hardfault_ _isr, , hw_esr_hardfault
101 #define _hw_isr_systick_ _isr, , hw_esr_systick
102 #define _hw_isr_systick_alarm _isr, , hw_esr_systick
103 
104 #define _hw_isr_counter2_ _isr, 28, hw_isr_counter2
105 #define _hw_isr_counter3_ _isr, 29, hw_isr_counter3
106 #define _hw_isr_counter4_ _isr, 30, hw_isr_counter4
107 
108 
109 /*******************************************************************************
110  * *
111  * Objects *
112  * *
113  * Object class, address *
114  * *
115  *******************************************************************************/
116 
117 /* NVIC
118  */
119 #include "../classes/nvica_1.h"
120 
121 #define hw_nvic _nvica, 0xE000E100
122 
123 
124 /* SysTick
125  *
126  */
127 #include "../classes/stka_1.h"
128 
129 #define hw_systick _stka, 0xE000E010
130 
131 
132 /* RCC
133  */
134 #include "../classes/rcca_1.h"
135 
136 #define hw_rcc _rcca, 0x40021000
137 
138 
139 /* GPIO
140  */
141 #include "../classes/gpa_1.h"
142 
143 #define hw_porta _gpa, 0x40010800
144 #define hw_portb _gpa, 0x40010C00
145 #define hw_portc _gpa, 0x40011000
146 #define hw_portd _gpa, 0x40011400
147 #define hw_porte _gpa, 0x40011800
148 #define hw_portf _gpa, 0x40011C00
149 #define hw_portg _gpa, 0x40012000
150 
151 #define hw_porta_cken _xb1, rcc, apb2enr, 1, 2 /* convenient */
152 #define hw_portb_cken _xb1, rcc, apb2enr, 1, 3 /* convenient */
153 #define hw_portc_cken _xb1, rcc, apb2enr, 1, 4 /* convenient */
154 #define hw_portd_cken _xb1, rcc, apb2enr, 1, 5 /* convenient */
155 #define hw_porte_cken _xb1, rcc, apb2enr, 1, 6 /* convenient */
156 #define hw_portf_cken _xb1, rcc, apb2enr, 1, 7 /* convenient */
157 #define hw_portg_cken _xb1, rcc, apb2enr, 1, 8 /* convenient */
158 
159 
160 /* Pin functions and mappings STM32F103-x8-xB.pdf, p. 28
161  *
162  * Each pin can be configured as a GPIO or as an "alternate" signal attached to
163  * a controller.
164  *
165  * Routing of one controller's signal to a pin is controlled by the controller
166  * through various configurations numbered in the 'remap' register. As the same
167  * signal can be routed to the same pin by different configurations, it seems
168  * necessary to gather the configurations of all the pins and decide later of
169  * the 'remap' values.
170  *
171  * The gpio/alternate function is set by the CNF bits in the pins' port
172  * registers. When an alternate function is selected, the pin is driven by the
173  * controller it is mapped to.
174  *
175  * Solution: for each signal that can be mapped, we record the address of the
176  * pin to attach. The commit procedure browses the attachements and tries to
177  * find valid remap values for the controllers.
178  */
179 #include "../classes/afioa_1.h"
180 
181 #define hw_afio _afioa, 0x40010000
182 
183 #define hw_afio_cken _xb1, rcc, apb2enr, 1, 0 /* convenient */
184 
185 #define _hw_af_porta_1_0 (gpio,wkup,(usart2,cts),(adc12,in0),(counter2,channel1),(counter2,etr))
186 #define _hw_af_porta_1_1 (gpio,(usart2,rts),(adc12,in1),(counter2,channel2))
187 
188 #define _hw_af_porta_1_2 (gpio,(usart2,tx),(adc12,in2),(counter2,channel3))
189 #define _hw_af_porta_1_2_usart2_tx
190 #define _hw_af_porta_1_2_adc12_in2
191 #define _hw_af_porta_1_2_counter2_channel3
192 
193 #define _hw_af_porta_1_3 (gpio,(usart2,rx),(adc12,in3),(counter2,channel4))
194 #define _hw_af_porta_1_4 (gpio,(spi1,nss),(usart2,ck),(adc12,in4))
195 #define _hw_af_porta_1_5 (gpio,(spi1,sck),(adc12,in5))
196 #define _hw_af_porta_1_6 (gpio,(spi1,miso),(adc12,in6),(counter3,channel1),(counter1,bkin))
197 #define _hw_af_porta_1_7 (gpio,(spi1,mosi),(adc12,in7),(counter3,channel2),(counter1,ch1n))
198 #define _hw_af_porta_1_9 (gpio,(usart1,tx),(counter1,channel2))
199 #define _hw_af_porta_1_10 (gpio,(usart1,rx),(counter1,channel3))
200 
201 #define _hw_af_portb_1_0 (gpio,(adc12,in8),(counter3,channel3),(counter1,ch2n))
202 #define _hw_af_portb_1_1 (gpio,(adc12,in9),(counter3,channel4),(counter1,ch3n))
203 #define _hw_af_portb_1_10 (gpio,(i2c2,scl),(usart3,tx),(counter2,channel3))
204 
205 #define _hw_af_portc_1_4 (gpio,(adc12,in14))
206 #define _hw_af_portc_1_5 (gpio,(adc12,in15))
207 #define _hw_af_portc_1_13 (gpio,(tamper_rtc))
208 #define _hw_af_portc_1_14 (gpio,(osc32_in))
209 #define _hw_af_portc_1_15 (gpio,(osc32_out))
210 
211 #define _hw_af_portd_1_0 (gpio,osc_in)
212 #define _hw_af_portd_1_1 (gpio,osc_out)
213 
214 #define _hw_af_porte_1_2 (traceck)
215 #define _hw_af_porte_1_3 (traced0)
216 #define _hw_af_porte_1_4 (traced1)
217 #define _hw_af_porte_1_5 (traced2)
218 #define _hw_af_porte_1_6 (traced3)
219 #define _hw_af_porte_1_7 ((counter1,etr))
220 #define _hw_af_porte_1_8 ((counter1,ch1n))
221 #define _hw_af_porte_1_9 ((counter1,ch1))
222 #define _hw_af_porte_1_10 ((counter1,ch2n))
223 
224 
225 /* Counters
226  */
227 #include "../classes/cta_1.h"
228 
229 #define hw_counter2 _cta, 0x40000000
230 #define hw_counter3 _cta, 0x40000400
231 #define hw_counter4 _cta, 0x40000800
232 
233 #define hw_counter2_cken _xb1, rcc, apb1enr, 1, 0 /* convenient */
234 #define hw_counter3_cken _xb1, rcc, apb1enr, 1, 1 /* convenient */
235 #define hw_counter4_cken _xb1, rcc, apb1enr, 1, 2 /* convenient */
236 #define hw_counter5_cken _xb1, rcc, apb1enr, 1, 3 /* convenient */
237 
238 #define hw_counter2_remap _xb1, afio, mapr, 2, 8
239 #define hw_counter3_remap _xb1, afio, mapr, 2, 10
240 #define hw_counter4_remap _xb1, afio, mapr, 1, 12
241 
242 
243 /* ADC
244  */
245 #include "../classes/ada_1.h"
246 
247 #define hw_adc1 _ada, 0x40012400
248 #define hw_adc2 _ada, 0x40012800
249 
250 
251 /* USART
252  */
253 #include "../classes/usarta_1.h"
254 
255 #define hw_usart1 _usarta, 0x40013800
256 
257 #define hw_usart1_nvic _nvirq, 37
258 
259 #define hw_usart2 _usarta, 0x40004400
260 #define hw_usart3 _usarta, 0x40004800
261 /* #define hw_uart4 _uarta, 0x40004C00 */
262 /* #define hw_uart5 _uarta, 0x40005000 */
263 
264 
265 /*******************************************************************************
266  * *
267  * HWA context *
268  * *
269  *******************************************************************************/
270 
271 #if !defined __ASSEMBLER__
272 
273 /* This structure is instanciated by hwa( begin ) or hwa( begin, reset ) and
274  * used by all hwa(...) instructions to bufferize hardware accesses.
275  */
276 typedef struct {
277  uint8_t commit ;
278  hwa_map_t map ;
279 
280  hwa_rcca_t rcc ;
281  hwa_nvica_t nvic ;
282 
283  hwa_afioa_t afio ;
284  hwa_gpa_t porta ;
285  hwa_gpa_t portb ;
286  hwa_gpa_t portc ;
287  hwa_gpa_t portd ;
288  hwa_gpa_t porte ;
289  /* hwa_gpa_t port5 ; */
290  /* hwa_gpa_t port6 ; */
291  hwa_stka_t systick ;
292 
293  hwa_cta_t counter2 ;
294  hwa_cta_t counter3 ;
295  hwa_cta_t counter4 ;
296  /* hwa_cta_t counter5 ; */
297  hwa_usarta_t usart1 ;
298 } hwa_t ;
299 
300 #include "../hwa_2.h"
301 #include "../classes/rcca_2.h"
302 
303 #include "../classes/afioa_2.h"
304 #include "../classes/nvica_2.h"
305 #include "../classes/gpa_2.h"
306 #include "../classes/stka_2.h"
307 #include "../classes/cta_2.h"
308 #include "../classes/usarta_2.h"
309 
310 
311 HW_INLINE void _hwa_setup_context( hwa_t *hwa )
312 {
313  _hwa_setup_o( rcc );
314  _hwa_setup_o( nvic );
315  _hwa_setup_o( afio );
316  _hwa_setup_o( porta );
317  _hwa_setup_o( portb );
318  _hwa_setup_o( portc );
319  _hwa_setup_o( portd );
320  _hwa_setup_o( porte );
321  _hwa_setup_o( systick );
322  _hwa_setup_o( counter2 );
323  _hwa_setup_o( counter3 );
324  _hwa_setup_o( counter4 );
325  _hwa_setup_o( usart1 );
326 }
327 
328 
329 HW_INLINE void _hwa_init_context( hwa_t *hwa )
330 {
331  _hwa_init_o( rcc );
332  _hwa_init_o( nvic );
333  _hwa_init_o( afio );
334  _hwa_init_o( porta );
335  _hwa_init_o( portb );
336  _hwa_init_o( portc );
337  _hwa_init_o( portd );
338  _hwa_init_o( porte );
339  _hwa_init_o( systick );
340  _hwa_init_o( counter2 );
341  _hwa_init_o( counter3 );
342  _hwa_init_o( counter4 );
343  _hwa_init_o( usart1 );
344 }
345 
346 
347 HW_INLINE void _hwa_commit_context( hwa_t *hwa )
348 {
349  _hwa_commit_o( rcc );
350  _hwa_commit_o( nvic );
351  _hwa_commit_o( afio );
352  _hwa_commit_o( porta );
353  _hwa_commit_o( portb );
354  _hwa_commit_o( portc );
355  _hwa_commit_o( portd );
356  _hwa_commit_o( porte );
357  _hwa_commit_o( systick );
358  _hwa_commit_o( counter2 );
359  _hwa_commit_o( counter3 );
360  _hwa_commit_o( counter4 );
361  _hwa_commit_o( usart1 );
362 }
363 
364 #endif /* !defined __ASSEMBLER__ */
_hwa_init_o
#define _hwa_init_o(o)
Initialize the HWA context registers of an object with their reset value.
Definition: hwa_2.h:331
hwa
#define hwa(...)
hwa( action, object [,...] ) stores an action for an object into a HWA context.
Definition: hwa_macros.h:552
_hwa_commit_o
#define _hwa_commit_o(o)
Commit the registers of an object.
Definition: hwa_2.h:349
_hwa_setup_o
#define _hwa_setup_o(o)
Initialize the HWA context registers addresses of an object.
Definition: hwa_2.h:322